Greg

@gregdavill.bsky.social

Electronics engineer. RISC-V ASICs at IQonIC Works 🧙‍♂️ (He/Him) I also take macro photos of electronics

I fixed a damaged USB-A port on a PS5 this week. The most tedious part was the 42 security trox screws encasing an EMI/Heat shield to the motherboard. 🙃

PS5 front I/O circuit board, next to a pile of screws.ifixit page for PS5 repair. showing 42 screw locations.

Not my neatest work, but it works. This wire's pvc melts super quickly, so soldering can be a challenge. But I still prefer having the colours 🙂 A quick 3d print to hold the wires avoids strain

circuit board with coloured wires soldered to an SMD footprint.

Quick weekend project to put enclosures over my various Glasgow prototypes. Teaching myself the "configurations" feature in fusion to handle slightly component placement differences between various Cx versions.

Colourful 3d printed enclosures for the Glasgow interface explorerColourful 3d printed enclosures for the Glasgow interface explorerColourful 3d printed enclosures for the Glasgow interface explorer

First samples on the first run from wafer.space! There is a disclaimer with these parts, that only ~80% are fully bonded successfully. This could be marketed as a feature, an air gapped solution using state of the art wireless bond wires. 😜

Bondwires in a COB packaged part, one bond wire has snapped from the PCB.Bondwires in a COB packaged part, one bond wire has snapped from the PCB.

LEDs ❇️ These are about all on at about the perfect brightness for visual indication. But my standard macro photography process (off camera flash) just floods so much extra light that these appear really dim.

Green light emitting diodes on a circuit board

Some BGA footprints are distinct enough to act like a fingerprint for the part. If you've used this part on a board design before you'll likely recognise it. 😉

solderpaste applied to various footprints on a green circuit board.

I'd forgotten that the ECP5-25F doesn't have all the I/O, and 4 or so pins that are on the 45/85F are N/C on the 25F. I just happened to use one of these for the ULPI interface. 🥲 Bodge wire to the rescue! Now we're enumerating again! USB boot loader in gateware, takes up ~15% of the device

Circuit board with bodge wire neatly snaking between passives. Connecting two vias.Terminal output from nextpnr showing an error that T16 is not available on this package.nextpnr output showing device usage around 15% of the logic for a HS USB core and QSPI logic to implement a boot loader.

These two boards have the same BGA geometry defined in their gerbers. For some reason JLCs DFM adjustments have expanded all the "via in pad" connections. Makes for an interesting visual effect.

Circuit board with a large BGA footprint. Some pads on the BGA package are larger than others.Circuit board with a large BGA footprint. All the pads on the BGA package are the same size.

I've been using KiCad 9's new table features to aid in schematic documentation. I guess it makes sense.. But still puzzled me for a moment that you can perform a vertical/horizontal mirror on a single cell. 🙃