People under time pressure don't work better, they just work faster. -- Peopleware
Preparatory work is important for software development, it helps to clearify ambiguity and uncertainty, thereby reduce the project risk. It's important to fix requirement and architeture elements at preparatory work.
Detail design is to answer the question that not determined by architecture design.
A cache is subset(copy) of an outer level memory. www.youtube.com/watch?v=XxWO...
SoC 101 - Lecture 6b: Cache Organization
System-on-Chip 101 or "Everything you wanted to know about a computer but were afraid to ask" This is Lecture 6 of my "SoC 101" course at Bar-Ilan University. In this course, I provide an overview of computer hardware engineering and SoC design, covering the full stack from the basic terminology, through computer architecture, and up to low-level software and design methodologies. The purpose of this course is to methodologically tell you about all those things that you may not have heard during your engineering studies and "fill the gaps" between the parts that you learned in-depth. It is in no way intended to provide a full, detailed description of every concept introduced, but following the course will give you a good idea about how a computer or any embedded system actually works. Lecture 6 is all about the memory hierarchy, focusing on caches and virtual memory. The lecture starts with the motivation for having a memory hierarchy and the principles of locality (spatial and temporal). It then dives into caches, explaining how they operate, the parameters that affect their performance, and tradeoffs in cache design. After that, the concept of virtual memory is introduced, going into the details of how it works, its challenges and how they are dealt with. The lecture finishes with the introduction of the TLB, how it all fits together within the CPU pipeline, and the various addressing possibilities of caches with TLBs (PIPT, VIVT, VIPT). Lecture slides can be found on the EnICS Labs web site at: https://enicslabs.com/academic-courses/soc-101/ All rights reserved: Prof. Adam Teman @AdiTeman Emerging nanoscaled Integrated Circuits and Systems (EnICS) Labs Faculty of Engineering, Bar-Ilan University
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What is hardware acceleration? CPU are general purpose programmable machines, we can offload the CPU by providing dedicated hardware to run a specific task, which is called "hardware acceleration". A very simple hw acceleration example is UART controller. www.youtube.com/watch?v=GHFr...
SoC 101 - Lecture 5b: Offloading the CPU
System-on-Chip 101or"Everything you wanted to know about a computer but were afraid to ask"This is Lecture 5 of my "SoC 101" course at Bar-Ilan University. I...
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Outstanding transaction in AXI protocol helps improve throughput. I didn't fine outstanding transaction definition in ARM document, but the following materials explain outstanding transactions very well. www.vlsiip.com/amba/axi_vs_... www.linkedin.com/posts/singhr....
AXI Vs AHB. Difference Between AXI and AHB
vlsiip.com
A common design process of embedded system. Marilyn Wolf. Computers As Components - Principles of embedded computing system design.
Very good explanation of Big endian and Little endian: www.youtube.com/watch?v=T1C9...
Lecture 22. Big Endian and Little Endian
Visit book website for more information: http://web.eece.maine.edu/~zhu/book
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Turing machine: A machine with infinite tape(memory), with a scanner can read and write to current position, and can move scanner left or right depend on current state of the machine. The amazing thing is that such a machine can do all computable problems! en.wikipedia.org/wiki/Turing_...
Turing machine - Wikipedia
en.wikipedia.org
SoC 101 a.k.a., "Everything you wanted to know about computers, but were afraid to ask" www.eng.biu.ac.il/temanad/soc-... Great SOC learning materials.
SoC 101 | Prof. Adam Teman
eng.biu.ac.il