XilinxDerg

@xilinxderg.bsky.social

๐Ÿซ ๐Ÿณ๏ธโ€๐ŸŒˆ 23/M ๐Ÿซ HW Engineer ๐Ÿซ Full Time Fluffy Dragon ๐Ÿซ Suit by @coyotescalling ๐Ÿซ ๐Ÿ”ž Minors DNI ๐Ÿซ

๐˜›๐˜ฆ๐˜ญ๐˜ญ ๐˜ฎ๐˜ฆ, ๐˜ต๐˜ฆ๐˜ญ๐˜ญ ๐˜ฎ๐˜ฆ, ๐˜ช๐˜ด ๐˜ญ๐˜ช๐˜ง๐˜ฆ ๐˜ซ๐˜ถ๐˜ด๐˜ต ๐˜ข ๐˜ฑ๐˜ญ๐˜ข๐˜บ๐˜จ๐˜ณ๐˜ฐ๐˜ถ๐˜ฏ๐˜ฅ? ๐˜›๐˜ฉ๐˜ช๐˜ฏ๐˜ฌ ๐˜บ๐˜ฐ๐˜ถ'๐˜ณ๐˜ฆ ๐˜ต๐˜ฉ๐˜ฆ ๐˜ณ๐˜ฆ๐˜ข๐˜ญ ๐˜ฅ๐˜ฆ๐˜ข๐˜ญ, ๐˜ฉ๐˜ฐ๐˜ฏ๐˜ฆ๐˜บ ๐˜ˆ๐˜ฏ๐˜ฅ ๐˜ด๐˜ฐ๐˜ฎ๐˜ฆ๐˜ฐ๐˜ฏ๐˜ฆ'๐˜ญ๐˜ญ ๐˜ข๐˜ญ๐˜ธ๐˜ข๐˜บ๐˜ด ๐˜ญ๐˜ฐ๐˜ฐ๐˜ฌ ๐˜ฐ๐˜ถ๐˜ต ๐˜ง๐˜ฐ๐˜ณ ๐˜บ๐˜ฐ๐˜ถ? #LVFC2025 ๐Ÿ“ธ @xilinxderg.bsky.social

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Been working on some really cool stuff! Just finished implementing a hyper FPGA optimized JPEG-esqe image compressor using only addition, subtraction and bit shifting! 1st pic - core evaluation script 2nd pic - Core FPGA test bench 3rd pic - RTL synthesis schematic

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wowow this yote is coming to MFF โ€˜24 Please: - ask for pics/hugs - trade stickers - involve me in suiting shens Please do not: - touch me without consent (esp nose boops) - expect long convos in suit, I canโ€™t hear you well and I donโ€™t want to yell to be heard - be weird, Iโ€™m Just A Coyoteโ„ข

a coyote fursuiter in a skyway by @poisonedshutter.bsky.social