Recent discussion about the perils of doors in gamedev reminded me of a bug caused by a door in a game you may have heard of called "Half Life 2". I wrote it up over on Mastodon (I find it's better at long threads): mastodon.gamedev.place/@TomF/115589...

Tom Forsyth (@TomF@mastodon.gamedev.place)

Attached: 1 image Recent discussion about the perils of doors in gamedev reminded me of a bug caused by a door in a game you may heard of called "Half Life 2". Are you sitting comfortably? Then I sha...

mastodon.gamedev.place

Tenstorrent decided to publish the first benchmark data for Ascalon's RVV implementation using the instruction throughput benchmark of my rvv-bench benchmark suite. <3 camel-cdr.github.io/rvv-bench-re... Overall, the results look really good so far:

The most underutilized #AVX512 instruction, VPSHUFBITQMB, is actually very useful for compactly generating a mask with arbitrary criteria based on b[5:0], e.g. to select special characters for parsing: if the second operand is a broadcasted 64-bit vector, where the ones represent the searched values

nietras@nietras.bsky.social · last yr.

New blog post "Sep 0.10.0 - 21 GB/s CSV Parsing Using SIMD on AMD 9950X 🚀" 📈 Sep #performance from 7 GB/s to 21 GB/s over last two years 🧑‍💻 #csharp #SIMD and #x64 assembly on #dotnet 9.0 🛠️ Tweaks and new #AVX512-to-256 parser 🔢 Lots of benchmarks 👇 nietras.com/2025/05/09/s... Please repost 🙏

Intel researchers have proposed Earth, an efficient architecture for RISC-V vector memory access patterns, enabling coalesced strided instruction memory access and buffer-free segment instruction processing. arxiv.org/pdf/2504.08334

Analyzing Modern NVIDIA GPU cores #HardwareArchitecture hgpu.org?p=29837

Analyzing Modern NVIDIA GPU cores

GPUs are the most popular platform for accelerating HPC workloads, such as artificial intelligence and science simulations. However, most microarchitectural research in academia relies on GPU core …

hgpu.org

Oh shit. I just realised no - it really is. I thought I was joking. This is going to require a long and complex backstory. Sorry absolutely not sorry it'll be funny maybe but also you'll learn something.

Hey Folks! cool little FOSS community tool released for simulating the way @tenstorrent.bsky.social Hardware works! Namely the way the tensix instruction stream operates: github.com/tenstorrent/...

GitHub - tenstorrent/tensix-isa-simulator

Contribute to tenstorrent/tensix-isa-simulator development by creating an account on GitHub.

github.com

I've now published my blog post, "I want a good parallel computer." raphlinus.github.io/gpu/2025/03/... . Thanks much to all the feedback on the draft, I'd like to think I've clarified some things that might have been confusing.

Another round of #Intel ISA defragmentation: Finally, #AVX10_2 is a common ISA for all CPU segments!

InstLatX64@instlatx64.bsky.social · 2y ago

#Intel ISA defragmentation: SDE 9.48 internally shows, that under the #AVX10_2 label there are 15 instruction groups in #DiamondRapids

Intel AVX10 Drops Optional 512-bit: No AVX10 256-bit Only E-Cores In The Future - https://www.phoronix.com/news/Intel-AVX10-Drops-256-Bit

Lights, camera, action! The world's largest digital camera has been installed at NSF–DOE Rubin Observatory! 🤩 The LSST Camera was the final major component of the observatory. With it in place, Rubin officially enters its final phase of testing!🔭 🔗: rubinobservatory.org/news/lsst-camera-installed

"All lessons in tech will be relearned every 25 years" -Me, looking at us relearning the same thing again

I gotta see so many posts saying "Rust is slower" and like I think these people just evaluate languages and designs based on vibes and not based on like the material output from the compilers.

The chance of asteroid 2024 YR4 hitting out planet in 2032 is now 1.5%, or 1 in 67. The OVERWHELMING likelihood is that the asteroid will miss Earth. But for the first time ever, we might have to seriously consider a deflection mission soon. Let me explain. 🧵 (1/x)

a picture of the earth and an asteroid with the national geographic logo

Alt: a picture of the earth and an asteroid heading towards it

media.tenor.com

I don't know anything about Raku, but these ads/posters are quite cool. #FOSDEM

Hey folks! Will be talking about the wonderful, wacky world of floating point Sunday afternoon in the HPC, Big data, & Data science dev room at 15:30! #fosdem

“Welcome to the largest open source conference on earth!” #FOSDEM

Hello Brussels ! #FOSDEM

Mmmmmnnnn, data.... thephd.dev/the-big-arra...

Results! - The Big Array Size Survey for C

Happy New Year! It is time report the results of the Array Size Operator survey and answer some comments people have been asking for!

thephd.dev

SDL 3 Official Release Now Available With New APIs - https://www.phoronix.com/news/SDL3-Official-Release

Linux 6.14 To Add Support For SpacemiT's "Energy Efficient AI" RISC-V CPUs - https://www.phoronix.com/news/Linux-6.14-SpaceMiT-RISC-V-CPUs

So long and thanks for all the fish! I just observed my last star this morning... #GaiaDPAC and @esa.int Gaia teams will do their best to make some great data releases from the data I gathered! #GaiaDR4 in 2026, #GaiaDR5 around the end of the decade. Keep posted for our news today at 10:00 CET.

rotating european space agency GIF - Find & Share on GIPHY

Discover & share this rotating european space agency GIF with everyone you know. GIPHY is how you search, share, discover, and create GIFs.

giphy.com

When you turn it on and it works spectacularly! The Rubin team has successfully completed the first on-sky engineering tests using the 144-Mpx engineering camera. Up next: installing the largest digital camera in the world, LSST Camera! 🔭🧪 rubinobservatory.org/news/rubin-completes-comcam-tests

today i learned x264 has a setting specifically for encoding touhou games

As Harold mentions, Prefix-Or is just v | -v. Segment-scan-or can also be simplified, for example uint64_t s = (v | m) >> 1; return s ^ (s - v) (4 instructions instead of 7).

Some neat tricks for computing bit-wise prefix-or and segmented-prefix-or within scalar registers.

Falvyu@falvyu.bsky.social · 2y ago

It turns that the 'unrolled loop' for the 64-bits bitwise-or segmented scan can actually be reduced down to a few instructions. (not sure if that's a known trick) Note: compilers optimize `((~mreset) | v)` so that it is only computed once.

Removing single line comments in multiple lines in parallel with RVV. If anyone has a good AVX512 solution, please share. Inspired by this reddit post: www.reddit.com/r/simd/comme... #RVV #RISC-V #SIMD

Mini thread on developer trust for #AMD. Effectively: the default assumption for AMD is that the stack will be broken. The community tried to help, but as Dave Airlie said years ago “throwing source code over the fence doesn’t make you FOSS” #HPC #ROCm

FCLC (being a silly goose)@fclc.bsky.social · 2y ago

(Not directed at you personally Phil) my concern is around trust. Years ago, the community got rocm working on RDNA1, submitted patches to amd, and those languished until the PRs became stale. Same for RDNA 2. Same for the DC versions of those GPUs. Official support for anything less than 10K is …